
From: Marcelo Tosatti <marcelo.tosatti@cyclades.com>

Change pagevec "nr" and "cold" back to "unsigned long", because 4 byte
accesses can be slow on architectures < Pentium III (additional "data16"
operand on instruction).

This still honours the cacheline alignment, making the size of "pagevec"
structure a power of two (either 64 or 128 bytes).

Haven't been able to see any significant change on performance on my
limited testing.

Signed-off-by: Andrew Morton <akpm@osdl.org>
---

 25-akpm/include/linux/pagevec.h |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff -puN include/linux/pagevec.h~change-pagevec-counters-back-to-unsigned-long-and-cacheline-align include/linux/pagevec.h
--- 25/include/linux/pagevec.h~change-pagevec-counters-back-to-unsigned-long-and-cacheline-align	Wed Oct 20 14:58:32 2004
+++ 25-akpm/include/linux/pagevec.h	Wed Oct 20 14:58:32 2004
@@ -5,14 +5,15 @@
  * pages.  A pagevec is a multipage container which is used for that.
  */
 
-#define PAGEVEC_SIZE	15
+/* 14 pointers + two long's align the pagevec structure to a power of two */
+#define PAGEVEC_SIZE	14
 
 struct page;
 struct address_space;
 
 struct pagevec {
-	unsigned short nr;
-	unsigned short cold;
+	unsigned long nr;
+	unsigned long cold;
 	struct page *pages[PAGEVEC_SIZE];
 };
 
_
