bk://bk.arm.linux.org.uk/linux-2.6-rmk tony@com.rmk.(none)|ChangeSet|20040521215948|15771 tony # This is a BitKeeper generated diff -Nru style patch. # # ChangeSet # 2004/05/21 18:48:26-07:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/05/21 18:48:22-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/05/21 22:59:48+01:00 tony@com.rmk.(none) # [ARM PATCH] 1887/1: Update OMAP low level debug functions again # # Patch from Tony Lindgren # # This patch makes the low level debug functions work when support is # compiled in for multiple OMAPs. The patch also removes now unnecessary # include, incorrect comment, and SERIAL_REG_SHIFT ifdefs. # # arch/arm/kernel/debug.S # 2004/05/18 17:19:13+01:00 tony@com.rmk.(none) +7 -10 # [PATCH] 1887/1: Update OMAP low level debug functions again # # ChangeSet # 2004/05/21 22:55:08+01:00 tony@com.rmk.(none) # [ARM PATCH] 1885/1: OMAP update 2/2: include files # # Patch from Tony Lindgren # # This patch syncs the mainline kernel with the linux-omap tree. # The highlights of the patch are: # - Changed the BOOT_MEM() to use the new IO address (Tony Lindgren) # - Cleaned up interrupt handler (Juha Yrjölä) # - DMA channel linking for 1610 (Samuel Ortiz) # - GPIO fixes (Juha Yrjölä) # - IRQ fix for OMAP-730 (Kevin Hilman) # - OMAP-1510 FPGA interrupt fix (Dirk Behme) # - OMAP-1610 voltage change settings (Todd Poynor) # - Uncompress kernel serial output fixes (Tony Lindgren) # # include/asm-arm/arch-omap/uncompress.h # 2004/05/18 19:24:45+01:00 tony@com.rmk.(none) +17 -7 # [PATCH] 1885/1: OMAP update 2/2: include files # # include/asm-arm/arch-omap/mux.h # 2004/05/18 19:24:45+01:00 tony@com.rmk.(none) +1 -1 # [PATCH] 1885/1: OMAP update 2/2: include files # # include/asm-arm/arch-omap/hardware.h # 2004/05/18 19:24:45+01:00 tony@com.rmk.(none) +13 -6 # [PATCH] 1885/1: OMAP update 2/2: include files # # include/asm-arm/arch-omap/dma.h # 2004/05/18 19:24:45+01:00 tony@com.rmk.(none) +3 -0 # [PATCH] 1885/1: OMAP update 2/2: include files # # ChangeSet # 2004/05/21 22:46:09+01:00 tony@com.rmk.(none) # [ARM PATCH] 1884/1: OMAP update 1/2: arch files # # Patch from Tony Lindgren # # This patch syncs the mainline kernel with the linux-omap tree. # The highlights of the patch are: # - Changed the BOOT_MEM() to use the new IO address (Tony Lindgren) # - Cleaned up interrupt handler (Juha Yrjölä) # - DMA channel linking for 1610 (Samuel Ortiz) # - GPIO fixes (Juha Yrjölä) # - IRQ fix for OMAP-730 (Kevin Hilman) # - OMAP-1510 FPGA interrupt fix (Dirk Behme) # - OMAP-1610 voltage change settings (Todd Poynor) # - Uncompress kernel serial output fixes (Tony Lindgren) # # arch/arm/mach-omap/leds-perseus2.c # 2004/05/18 17:24:47+01:00 tony@com.rmk.(none) +1 -1 # [PATCH] 1884/1: OMAP update 1/2: arch files # # arch/arm/mach-omap/irq.c # 2004/05/18 18:34:13+01:00 tony@com.rmk.(none) +90 -155 # [PATCH] 1884/1: OMAP update 1/2: arch files # # arch/arm/mach-omap/gpio.c # 2004/05/18 17:24:47+01:00 tony@com.rmk.(none) +3 -3 # [PATCH] 1884/1: OMAP update 1/2: arch files # # arch/arm/mach-omap/dma.c # 2004/05/18 17:24:47+01:00 tony@com.rmk.(none) +114 -3 # [PATCH] 1884/1: OMAP update 1/2: arch files # # arch/arm/mach-omap/board-perseus2.c # 2004/05/18 17:24:48+01:00 tony@com.rmk.(none) +1 -1 # [PATCH] 1884/1: OMAP update 1/2: arch files # # arch/arm/mach-omap/board-osk.c # 2004/05/18 17:24:47+01:00 tony@com.rmk.(none) +1 -1 # [PATCH] 1884/1: OMAP update 1/2: arch files # # arch/arm/mach-omap/board-innovator.c # 2004/05/18 17:24:47+01:00 tony@com.rmk.(none) +1 -1 # [PATCH] 1884/1: OMAP update 1/2: arch files # # arch/arm/mach-omap/board-generic.c # 2004/05/18 17:24:47+01:00 tony@com.rmk.(none) +1 -1 # [PATCH] 1884/1: OMAP update 1/2: arch files # # BitKeeper/deleted/.del-irq.h~e85c1cda6df21b84 # 2004/05/21 22:43:02+01:00 tony@com.rmk.(none) +0 -0 # Delete: arch/arm/mach-omap/irq.h # # ChangeSet # 2004/05/21 09:47:55+01:00 nico@org.rmk.(none) # [ARM PATCH] 1889/1: don't select CONFIG_IWMMXT just yet with Mainstone # # Patch from Nicolas Pitre # # Since the iWMMXt patch (#1866/1) requires more time to be reviewed, # this patch will allow merging Mainstone patches without breaking # anything if iWMMXt support isn't merged yet. # Should be applied after patch #1867/1. # # arch/arm/mach-pxa/Kconfig # 2004/05/20 13:25:09+01:00 nico@org.rmk.(none) +1 -1 # [PATCH] 1889/1: don't select CONFIG_IWMMXT just yet with Mainstone # # ChangeSet # 2004/05/21 09:44:10+01:00 nico@org.rmk.(none) # [ARM PATCH] 1870/1: defconfig for Mainstone # # Patch from Nicolas Pitre # # # arch/arm/configs/mainstone_defconfig # 2004/05/13 02:04:34+01:00 nico@org.rmk.(none) +743 -0 # [PATCH] 1870/1: defconfig for Mainstone # # arch/arm/configs/mainstone_defconfig # 2004/05/13 02:04:34+01:00 nico@org.rmk.(none) +0 -0 # BitKeeper file /usr/src/bk/linux-2.6-rmk/arch/arm/configs/mainstone_defconfig # # ChangeSet # 2004/05/21 09:40:03+01:00 nico@org.rmk.(none) # [ARM PATCH] 1868/1: support for LEDs on Mainstone # # Patch from Nicolas Pitre # # # arch/arm/mach-pxa/leds.h # 2004/04/28 18:17:34+01:00 nico@org.rmk.(none) +2 -1 # [PATCH] 1868/1: support for LEDs on Mainstone # # arch/arm/mach-pxa/leds.c # 2004/04/28 18:18:47+01:00 nico@org.rmk.(none) +2 -0 # [PATCH] 1868/1: support for LEDs on Mainstone # # arch/arm/mach-pxa/Makefile # 2004/04/28 22:15:30+01:00 nico@org.rmk.(none) +1 -0 # [PATCH] 1868/1: support for LEDs on Mainstone # # arch/arm/Kconfig # 2004/05/10 18:46:58+01:00 nico@org.rmk.(none) +4 -4 # [PATCH] 1868/1: support for LEDs on Mainstone # # arch/arm/mach-pxa/leds-mainstone.c # 2004/04/29 20:13:55+01:00 nico@org.rmk.(none) +118 -0 # [PATCH] 1868/1: support for LEDs on Mainstone # # arch/arm/mach-pxa/leds-mainstone.c # 2004/04/29 20:13:55+01:00 nico@org.rmk.(none) +0 -0 # BitKeeper file /usr/src/bk/linux-2.6-rmk/arch/arm/mach-pxa/leds-mainstone.c # # ChangeSet # 2004/05/21 09:35:39+01:00 nico@org.rmk.(none) # [ARM PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # Patch from Nicolas Pitre # # # include/asm-arm/arch-pxa/mainstone.h # 2004/04/28 18:12:37+01:00 nico@org.rmk.(none) +120 -0 # [PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # include/asm-arm/arch-pxa/irqs.h # 2004/04/29 03:38:18+01:00 nico@org.rmk.(none) +18 -1 # [PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # include/asm-arm/arch-pxa/hardware.h # 2004/04/30 01:52:42+01:00 nico@org.rmk.(none) +1 -0 # [PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # arch/arm/mach-pxa/Makefile # 2004/04/28 22:15:30+01:00 nico@org.rmk.(none) +1 -0 # [PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # arch/arm/mach-pxa/Kconfig # 2004/04/28 21:28:31+01:00 nico@org.rmk.(none) +6 -0 # [PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # include/asm-arm/arch-pxa/mainstone.h # 2004/04/28 18:12:37+01:00 nico@org.rmk.(none) +0 -0 # BitKeeper file /usr/src/bk/linux-2.6-rmk/include/asm-arm/arch-pxa/mainstone.h # # arch/arm/Kconfig # 2004/05/10 18:46:58+01:00 nico@org.rmk.(none) +1 -1 # [PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # arch/arm/mach-pxa/mainstone.c # 2004/04/29 20:12:40+01:00 nico@org.rmk.(none) +139 -0 # [PATCH] 1867/1: support for the Intel Mainstone (PXA27x based) eval board # # arch/arm/mach-pxa/mainstone.c # 2004/04/29 20:12:40+01:00 nico@org.rmk.(none) +0 -0 # BitKeeper file /usr/src/bk/linux-2.6-rmk/arch/arm/mach-pxa/mainstone.c # # ChangeSet # 2004/05/20 10:53:00-07:00 dvrabel@arcom.com # [ARM] Fix IXP4XX_OST_RELOAD_MASK definition to not mask proper bits # # Current definition of OST_RELOAD_MASK masks off bit 2 of # the timer reload value register when it should mask bits 0 # and 1. This would cause small timeout values to be loaded # incorrectly. # # include/asm-arm/arch-ixp4xx/ixp4xx-regs.h # 2004/05/20 10:52:49-07:00 dvrabel@arcom.com +1 -1 # Fix IXP4XX_OST_RELOAD_MASK to mask proper bits # # ChangeSet # 2004/05/20 10:33:31-07:00 dvrabel@arcom.com # [ARM] Fix IXP4xx CLOCK_TICK_RATE to match HW 66.66... MHz # # include/asm-arm/arch-ixp4xx/timex.h # 2004/05/20 10:33:17-07:00 dvrabel@arcom.com +3 -2 # Fix IXP4xx CLOCK_TICK_RATE to match HW 66.66... MHz # # ChangeSet # 2004/05/19 13:23:38-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/05/19 13:23:35-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/05/18 23:42:05-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # include/linux/pci_ids.h # 2004/05/18 23:42:03-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/05/18 14:28:02-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # include/linux/pci_ids.h # 2004/05/18 14:27:59-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/05/17 14:56:28-07:00 dsaxena@xanadu.(none) # [ARM] Fix bogus variable name in dev_dbg() call in dmabounce code. # # arch/arm/common/dmabounce.c # 2004/05/17 14:56:16-07:00 dsaxena@xanadu.(none) +1 -1 # dev_dbg using wrong variable name which causes compile with CONFIG_DMABOUNCE # to fail. Looks like this has been in for a while but some change in the # dev_* macros must have finally caught it. # # ChangeSet # 2004/05/16 01:23:53-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # include/linux/pci_ids.h # 2004/05/16 01:23:50-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/05/14 21:19:47-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # include/linux/pci_ids.h # 2004/05/14 21:19:44-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/05/14 01:37:50-07:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/05/14 01:37:45-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/05/09 21:06:39-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/05/09 21:06:36-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/29 15:40:20-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # arch/arm/mm/fault-armv.c # 2004/04/29 15:40:17-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/24 23:41:39-07:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/04/24 23:41:36-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/21 21:45:04-07:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/04/21 21:45:01-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/19 19:21:35-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # include/asm-arm/cacheflush.h # 2004/04/19 19:21:32-07:00 akpm@bix.(none) +0 -0 # Auto merged # # arch/arm/mm/fault-armv.c # 2004/04/19 19:21:32-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/12 20:39:35-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # include/asm-arm/cacheflush.h # 2004/04/12 20:39:33-07:00 akpm@bix.(none) +0 -0 # Auto merged # # arch/arm/mm/fault-armv.c # 2004/04/12 20:39:33-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/12 17:00:01-07:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # include/asm-arm/cacheflush.h # 2004/04/12 16:59:58-07:00 akpm@bix.(none) +0 -0 # Auto merged # # arch/arm/mm/fault-armv.c # 2004/04/12 16:59:58-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/08 14:53:48-07:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/04/08 14:53:46-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/05 15:36:29-07:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/04/05 15:36:26-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/04/04 16:01:39-07:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/04/04 16:01:36-07:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/03/27 02:24:52-08:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/dead-bk-arm # # arch/arm/Kconfig # 2004/03/27 02:24:49-08:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/03/25 10:54:20-08:00 akpm@bix.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/03/25 10:54:18-08:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/03/19 10:00:02-08:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/03/19 09:59:59-08:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/03/15 22:29:04-08:00 akpm@bix.(none) # Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/03/15 22:28:51-08:00 akpm@bix.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/26 11:28:15-08:00 akpm@mnm.(none) # Merge mnm.(none):/usr/src/bk25 into mnm.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/02/26 11:28:09-08:00 akpm@mnm.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/23 20:16:50-08:00 akpm@mnm.(none) # Merge mnm.(none):/usr/src/bk25 into mnm.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/02/23 20:16:44-08:00 akpm@mnm.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/20 18:41:24-08:00 akpm@mnm.(none) # Merge mnm.(none):/usr/src/bk25 into mnm.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/02/20 18:41:17-08:00 akpm@mnm.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/20 13:48:13-08:00 akpm@mnm.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into mnm.(none):/usr/src/bk-arm # # include/asm-arm/pci.h # 2004/02/20 13:48:07-08:00 akpm@mnm.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/20 13:45:54-08:00 akpm@mnm.(none) # Merge mnm.(none):/usr/src/bk25 into mnm.(none):/usr/src/bk-arm # # arch/arm/Kconfig # 2004/02/20 13:45:48-08:00 akpm@mnm.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/10 12:08:32-08:00 akpm@mnm.(none) # Merge mnm.(none):/usr/src/bk25 into mnm.(none):/usr/src/bk-arm # # include/asm-arm/pci.h # 2004/02/10 12:08:26-08:00 akpm@mnm.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/06 13:18:37-08:00 akpm@mnm.(none) # Merge mnm.(none):/usr/src/bk25 into mnm.(none):/usr/src/bk-arm # # include/asm-arm/pci.h # 2004/02/06 13:18:30-08:00 akpm@mnm.(none) +0 -0 # Auto merged # # ChangeSet # 2004/02/06 10:43:46-08:00 akpm@mnm.(none) # Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk # into mnm.(none):/usr/src/bk-arm # # include/asm-arm/pci.h # 2004/02/06 10:43:40-08:00 akpm@mnm.(none) +0 -0 # Auto merged # diff -Nru a/arch/arm/Kconfig b/arch/arm/Kconfig --- a/arch/arm/Kconfig Fri May 21 18:49:11 2004 +++ b/arch/arm/Kconfig Fri May 21 18:49:11 2004 @@ -85,7 +85,7 @@ bool "Co-EBSA285" config ARCH_PXA - bool "PXA250/210-based" + bool "PXA2xx-based" config ARCH_EBSA110 bool "EBSA-110" @@ -539,7 +539,7 @@ config LEDS bool "Timer and CPU usage LEDs" - depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB + depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB help If you say Y here, the LEDs on your machine will be used to provide useful information about your current system status. @@ -552,8 +552,8 @@ system, but the driver will do nothing. config LEDS_TIMER - bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB) - depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB + bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || MACH_MAINSTONE || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB) + depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB default y if ARCH_EBSA110 help If you say Y here, one of the system LEDs (the green one on the @@ -568,7 +568,7 @@ config LEDS_CPU bool "CPU usage LED" - depends on LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB) + depends on LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB) help If you say Y here, the red LED will be used to give a good real time indication of CPU usage, by lighting whenever the idle task diff -Nru a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c --- a/arch/arm/common/dmabounce.c Fri May 21 18:49:11 2004 +++ b/arch/arm/common/dmabounce.c Fri May 21 18:49:11 2004 @@ -185,7 +185,7 @@ static inline void free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *buf) { - dev_dbg(dev_info->dev, "%s(buf=%p)\n", __func__, buf); + dev_dbg(device_info->dev, "%s(buf=%p)\n", __func__, buf); list_del(&buf->node); diff -Nru a/arch/arm/configs/mainstone_defconfig b/arch/arm/configs/mainstone_defconfig --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/configs/mainstone_defconfig Fri May 21 18:49:11 2004 @@ -0,0 +1,743 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_STANDALONE=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_HOTPLUG=y +# CONFIG_IKCONFIG is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODULE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_KMOD is not set + +# +# System Type +# +# CONFIG_ARCH_ADIFCC is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_VERSATILE_PB is not set + +# +# CLPS711X/EP721X Implementations +# + +# +# Epxa10db +# + +# +# Footbridge Implementations +# + +# +# IOP3xx Implementation Options +# +# CONFIG_ARCH_IOP310 is not set +# CONFIG_ARCH_IOP321 is not set + +# +# IOP3xx Chipset Features +# + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +CONFIG_MACH_MAINSTONE=y +# CONFIG_ARCH_PXA_IDP is not set +CONFIG_PXA27x=y +CONFIG_IWMMXT=y + +# +# SA11x0 Implementations +# + +# +# TI OMAP Implementations +# + +# +# OMAP Core Type +# + +# +# OMAP Board Type +# + +# +# OMAP Feature Selections +# + +# +# S3C2410 Implementations +# + +# +# LH7A40X Implementations +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_MINICACHE=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +CONFIG_XSCALE_PMU=y + +# +# General setup +# +# CONFIG_ZBOOT_ROM is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 + +# +# PCMCIA/CardBus support +# +CONFIG_PCMCIA=y +# CONFIG_PCMCIA_DEBUG is not set +# CONFIG_TCIC is not set +CONFIG_PCMCIA_PXA2XX=y + +# +# At least one math emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Generic Driver Options +# +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_PM is not set +# CONFIG_PREEMPT is not set +# CONFIG_ARTHUR is not set +CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M" +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +CONFIG_LEDS_CPU=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_REDBOOT_PARTS=y +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_CFI_B1 is not set +# CONFIG_MTD_CFI_B2 is not set +CONFIG_MTD_CFI_B4=y +# CONFIG_MTD_CFI_B8 is not set +# CONFIG_MTD_CFI_I1 is not set +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_EDB7312 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_PACKET is not set +# CONFIG_NETLINK_DEV is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_SMC91X=y + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_IDEDISK_STROKE is not set +CONFIG_BLK_DEV_IDECS=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set +# CONFIG_IDE_TASKFILE_IO is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Fusion MPT device support +# + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_CT82C710 is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_QIC02_TAPE is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set +# CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_RAW_DRIVER is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVPTS_FS_XATTR is not set +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_NAND is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +# CONFIG_EXPORTFS is not set +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# Misc devices +# + +# +# USB support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# Kernel hacking +# +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SLAB is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_WAITQ is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff -Nru a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S --- a/arch/arm/kernel/debug.S Fri May 21 18:49:11 2004 +++ b/arch/arm/kernel/debug.S Fri May 21 18:49:11 2004 @@ -492,14 +492,6 @@ #elif defined(CONFIG_ARCH_OMAP) -#include - -#ifdef CONFIG_ARCH_OMAP730 -#define OMAP_SERIAL_REG_SHIFT 0 -#else -#define OMAP_SERIAL_REG_SHIFT 2 -#endif - /* See also __create_page_tables in head.S */ .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? @@ -519,10 +511,15 @@ .endm .macro busyuart,rd,rx -1002: ldrb \rd, [\rx, #(0x5 << OMAP_SERIAL_REG_SHIFT)] +1001: ldrb \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends + and \rd, \rd, #0x60 + teq \rd, #0x60 + beq 1002f + ldrb \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only and \rd, \rd, #0x60 teq \rd, #0x60 - bne 1002b + bne 1001b +1002: .endm .macro waituart,rd,rx diff -Nru a/arch/arm/mach-omap/board-generic.c b/arch/arm/mach-omap/board-generic.c --- a/arch/arm/mach-omap/board-generic.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/board-generic.c Fri May 21 18:49:11 2004 @@ -66,7 +66,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP-1510/1610") MAINTAINER("Tony Lindgren ") - BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000) + BOOT_MEM(0x10000000, 0xfff00000, 0xfef00000) BOOT_PARAMS(0x10000100) MAPIO(omap_generic_map_io) INITIRQ(omap_generic_init_irq) diff -Nru a/arch/arm/mach-omap/board-innovator.c b/arch/arm/mach-omap/board-innovator.c --- a/arch/arm/mach-omap/board-innovator.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/board-innovator.c Fri May 21 18:49:11 2004 @@ -149,7 +149,7 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") MAINTAINER("MontaVista Software, Inc.") - BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000) + BOOT_MEM(0x10000000, 0xfff00000, 0xfef00000) BOOT_PARAMS(0x10000100) MAPIO(innovator_map_io) INITIRQ(innovator_init_irq) diff -Nru a/arch/arm/mach-omap/board-osk.c b/arch/arm/mach-omap/board-osk.c --- a/arch/arm/mach-omap/board-osk.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/board-osk.c Fri May 21 18:49:11 2004 @@ -89,7 +89,7 @@ MACHINE_START(OMAP_OSK, "TI-OSK") MAINTAINER("Dirk Behme ") - BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000) + BOOT_MEM(0x10000000, 0xfff00000, 0xfef00000) BOOT_PARAMS(0x10000100) MAPIO(osk_map_io) INITIRQ(osk_init_irq) diff -Nru a/arch/arm/mach-omap/board-perseus2.c b/arch/arm/mach-omap/board-perseus2.c --- a/arch/arm/mach-omap/board-perseus2.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/board-perseus2.c Fri May 21 18:49:11 2004 @@ -103,7 +103,7 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") MAINTAINER("Kevin Hilman ") - BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000) + BOOT_MEM(0x10000000, 0xfff00000, 0xfef00000) BOOT_PARAMS(0x10000100) MAPIO(omap_perseus2_map_io) INITIRQ(omap_perseus2_init_irq) diff -Nru a/arch/arm/mach-omap/dma.c b/arch/arm/mach-omap/dma.c --- a/arch/arm/mach-omap/dma.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/dma.c Fri May 21 18:49:11 2004 @@ -3,6 +3,7 @@ * * Copyright (C) 2003 Nokia Corporation * Author: Juha Yrjölä + * DMA channel linking for 1610 by Samuel Ortiz * * Support functions for the OMAP internal DMA channels. * @@ -34,6 +35,7 @@ static int enable_1510_mode = 0; struct omap_dma_lch { + int next_lch; int dev_id; u16 saved_csr; u16 enabled_irqs; @@ -154,6 +156,38 @@ { u16 w; + if (!omap_dma_in_1510_mode()) { + int next_lch; + + next_lch = dma_chan[lch].next_lch; + + /* Enable the queue, if needed so. */ + if (next_lch != -1) { + /* Clear the STOP_LNK bits */ + w = omap_readw(OMAP_DMA_CLNK_CTRL_REG(lch)); + w &= ~(1 << 14); + omap_writew(w, OMAP_DMA_CLNK_CTRL_REG(lch)); + w = omap_readw(OMAP_DMA_CLNK_CTRL_REG(next_lch)); + w &= ~(1 << 14); + omap_writew(w, OMAP_DMA_CLNK_CTRL_REG(next_lch)); + + /* And set the ENABLE_LNK bits */ + omap_writew(next_lch | (1 << 15), + OMAP_DMA_CLNK_CTRL_REG(lch)); + /* The loop case */ + if (dma_chan[next_lch].next_lch == lch) + omap_writew(lch | (1 << 15), + OMAP_DMA_CLNK_CTRL_REG(next_lch)); + + /* Read CSR to make sure it's cleared. */ + w = omap_readw(OMAP_DMA_CSR_REG(next_lch)); + /* Enable some nice interrupts. */ + omap_writew(dma_chan[next_lch].enabled_irqs, + OMAP_DMA_CICR_REG(next_lch)); + dma_chan[next_lch].flags |= OMAP_DMA_ACTIVE; + } + } + /* Read CSR to make sure it's cleared. */ w = omap_readw(OMAP_DMA_CSR_REG(lch)); /* Enable some nice interrupts. */ @@ -168,14 +202,37 @@ void omap_stop_dma(int lch) { u16 w; + int next_lch; /* Disable all interrupts on the channel */ omap_writew(0, OMAP_DMA_CICR_REG(lch)); - w = omap_readw(OMAP_DMA_CCR_REG(lch)); - w &= ~OMAP_DMA_CCR_EN; - omap_writew(w, OMAP_DMA_CCR_REG(lch)); + if (omap_dma_in_1510_mode()) { + w = omap_readw(OMAP_DMA_CCR_REG(lch)); + w &= ~OMAP_DMA_CCR_EN; + omap_writew(w, OMAP_DMA_CCR_REG(lch)); + dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE; + return; + } + + next_lch = dma_chan[lch].next_lch; + + /* + * According to thw HW spec, enabling the STOP_LNK bit + * resets the CCR_EN bit at the same time. + */ + w = omap_readw(OMAP_DMA_CLNK_CTRL_REG(lch)); + w |= (1 << 14); + w = omap_writew(w, OMAP_DMA_CLNK_CTRL_REG(lch)); dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE; + + if (next_lch != -1) { + omap_writew(0, OMAP_DMA_CICR_REG(next_lch)); + w = omap_readw(OMAP_DMA_CLNK_CTRL_REG(next_lch)); + w |= (1 << 14); + w = omap_writew(w, OMAP_DMA_CLNK_CTRL_REG(next_lch)); + dma_chan[next_lch].flags &= ~OMAP_DMA_ACTIVE; + } } void omap_enable_dma_irq(int lch, u16 bits) @@ -315,6 +372,56 @@ return enable_1510_mode; } +/* + * lch_queue DMA will start right after lch_head one is finished. + * For this DMA link to start, you still need to start (see omap_start_dma) + * the first one. That will fire up the entire queue. + */ +void omap_dma_link_lch (int lch_head, int lch_queue) +{ + if (omap_dma_in_1510_mode()) { + printk(KERN_ERR "DMA linking is not supported in 1510 mode\n"); + BUG(); + return; + } + + if ((dma_chan[lch_head].dev_id == -1) || + (dma_chan[lch_queue].dev_id == -1)) { + printk(KERN_ERR "omap_dma: trying to link non requested channels\n"); + dump_stack(); + } + + dma_chan[lch_head].next_lch = lch_queue; +} + +/* + * Once the DMA queue is stopped, we can destroy it. + */ +void omap_dma_unlink_lch (int lch_head, int lch_queue) +{ + if (omap_dma_in_1510_mode()) { + printk(KERN_ERR "DMA linking is not supported in 1510 mode\n"); + BUG(); + return; + } + + if (dma_chan[lch_head].next_lch != lch_queue || + dma_chan[lch_head].next_lch == -1) { + printk(KERN_ERR "omap_dma: trying to unlink non linked channels\n"); + dump_stack(); + } + + + if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || + (dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) { + printk(KERN_ERR "omap_dma: You need to stop the DMA channels before unlinking\n"); + dump_stack(); + } + + dma_chan[lch_head].next_lch = -1; + dma_chan[lch_queue].next_lch = -1; +} + static struct lcd_dma_info { spinlock_t lock; @@ -522,6 +629,8 @@ for (ch = 0; ch < dma_chan_count; ch++) { dma_chan[ch].dev_id = -1; + dma_chan[ch].next_lch = -1; + if (ch >= 6 && enable_1510_mode) continue; @@ -551,6 +660,8 @@ EXPORT_SYMBOL(omap_set_dma_transfer_params); EXPORT_SYMBOL(omap_set_dma_src_params); EXPORT_SYMBOL(omap_set_dma_dest_params); +EXPORT_SYMBOL(omap_dma_link_lch); +EXPORT_SYMBOL(omap_dma_unlink_lch); EXPORT_SYMBOL(omap_request_lcd_dma); EXPORT_SYMBOL(omap_free_lcd_dma); diff -Nru a/arch/arm/mach-omap/gpio.c b/arch/arm/mach-omap/gpio.c --- a/arch/arm/mach-omap/gpio.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/gpio.c Fri May 21 18:49:11 2004 @@ -587,15 +587,15 @@ #ifdef CONFIG_ARCH_OMAP1510 if (bank->method == METHOD_GPIO_1510) - omap_writew(1 << gpio, bank->base + OMAP1510_GPIO_INT_STATUS); + omap_writew(1 << (gpio & 0x0f), bank->base + OMAP1510_GPIO_INT_STATUS); #endif #if defined(CONFIG_ARCH_OMAP1610) || defined(CONFIG_ARCH_OMAP5912) if (bank->method == METHOD_GPIO_1610) - omap_writew(1 << gpio, bank->base + OMAP1610_GPIO_IRQSTATUS1); + omap_writew(1 << (gpio & 0x0f), bank->base + OMAP1610_GPIO_IRQSTATUS1); #endif #ifdef CONFIG_ARCH_OMAP730 if (bank->method == METHOD_GPIO_730) - omap_writel(1 << gpio, bank->base + OMAP730_GPIO_INT_STATUS); + omap_writel(1 << (gpio & 0x1f), bank->base + OMAP730_GPIO_INT_STATUS); #endif } diff -Nru a/arch/arm/mach-omap/irq.c b/arch/arm/mach-omap/irq.c --- a/arch/arm/mach-omap/irq.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/irq.c Fri May 21 18:49:11 2004 @@ -5,6 +5,7 @@ * * Copyright (C) 2004 Nokia Corporation * Written by Tony Lindgren + * Major cleanups by Juha Yrjölä * * Completely re-written to support various OMAP chips with bank specific * interrupt handlers. @@ -49,10 +50,16 @@ #include -#include "irq.h" +#define IRQ_BANK(irq) ((irq) >> 5) +#define IRQ_BIT(irq) ((irq) & 0x1f) -static unsigned int banks = 0; -static struct omap_irq_bank irq_banks[MAX_NR_IRQ_BANKS]; +struct omap_irq_bank { + unsigned long base_reg; + unsigned long trigger_map; +}; + +static unsigned int irq_bank_count = 0; +static struct omap_irq_bank *irq_banks; static inline unsigned int irq_bank_readl(int bank, int offset) { @@ -64,10 +71,7 @@ omap_writel(value, irq_banks[bank].base_reg + offset); } -/* - * Ack routine for chips with register offsets of 0x100 - */ -static void omap_offset_ack_irq(unsigned int irq) +static void omap_ack_irq(unsigned int irq) { if (irq > 31) omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG); @@ -75,83 +79,30 @@ omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG); } -/* - * Mask routine for chips with register offsets of 0x100 - */ -static void omap_offset_mask_irq(unsigned int irq) +static void omap_mask_irq(unsigned int irq) { - int bank = IRQ_TO_BANK(irq); + int bank = IRQ_BANK(irq); + u32 l; - if (bank) { - omap_writel( - omap_readl(OMAP_IH2_BASE + BANK_OFFSET(bank) + IRQ_MIR) - | (1 << IRQ_BIT(irq)), - OMAP_IH2_BASE + BANK_OFFSET(bank) + IRQ_MIR); - } else { - omap_writel( - omap_readl(OMAP_IH1_BASE + IRQ_MIR) - | (1 << IRQ_BIT(irq)), - OMAP_IH1_BASE + IRQ_MIR); - } + l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR); + l |= 1 << IRQ_BIT(irq); + omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR); } -/* - * Unmask routine for chips with register offsets of 0x100 - */ -static void omap_offset_unmask_irq(unsigned int irq) +static void omap_unmask_irq(unsigned int irq) { - int bank = IRQ_TO_BANK(irq); + int bank = IRQ_BANK(irq); + u32 l; - if (bank) { - omap_writel( - omap_readl(OMAP_IH2_BASE + BANK_OFFSET(bank) + IRQ_MIR) - & ~(1 << IRQ_BIT(irq)), - OMAP_IH2_BASE + BANK_OFFSET(bank) + IRQ_MIR); - } else { - omap_writel( - omap_readl(OMAP_IH1_BASE + IRQ_MIR) - & ~(1 << IRQ_BIT(irq)), - OMAP_IH1_BASE + IRQ_MIR); - } + l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR); + l &= ~(1 << IRQ_BIT(irq)); + omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR); } -static void omap_offset_mask_ack_irq(unsigned int irq) +static void omap_mask_ack_irq(unsigned int irq) { - omap_offset_mask_irq(irq); - omap_offset_ack_irq(irq); -} - -/* - * Given the irq number returns the bank number - */ -signed int irq_get_bank(unsigned int irq) -{ - int i; - - for (i = 0; i < banks; i++) { - if (irq >= irq_banks[i].start_irq - && irq <= irq_banks[i].start_irq + BANK_NR_IRQS) { - return i; - } - } - - printk(KERN_ERR "No irq handler found for irq %i\n", irq); - - return -ENODEV; -} - -/* - * Given the bank and irq number returns the irq bit at the bank register - */ -signed int irq_bank_get_bit(int bank, unsigned int irq) -{ - if (irq_banks[bank].start_irq > irq) { - printk(KERN_ERR "Incorrect irq %i: bank %i offset %i\n", - irq, bank, irq_banks[bank].start_irq); - return -ENODEV; - } - - return irq - irq_banks[bank].start_irq; + omap_mask_irq(irq); + omap_ack_irq(irq); } /* @@ -161,114 +112,98 @@ * mailing list threads on FIQ handlers if you are planning to * add a FIQ handler for OMAP. */ -void omap_irq_set_cfg(int irq, int fiq, int priority, int irq_level) +static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger) { signed int bank; - unsigned int irq_bit; unsigned long val, offset; - - bank = irq_get_bank(irq); - - if (bank < 0) - return; - - irq_bit = irq_bank_get_bit(bank, irq); - - if (irq_bit < 0) - return; - - /* FIQ is only availabe on bank 0 interrupts */ + bank = IRQ_BANK(irq); + /* FIQ is only available on bank 0 interrupts */ fiq = bank ? 0 : (fiq & 0x1); + val = fiq | ((priority & 0x1f) << 2) | ((trigger & 0x1) << 1); + offset = IRQ_ILR0 + IRQ_BIT(irq) * 0x4; + irq_bank_writel(val, bank, offset); +} - val = fiq | ((priority & 0x1f) << 2) | ((irq_level & 0x1) << 1); +#ifdef CONFIG_ARCH_OMAP730 +static struct omap_irq_bank omap730_irq_banks[] = { + { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, + { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, + { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, +}; +#endif - offset = IRQ_ILR0 + irq_bit * 0x4; +#ifdef CONFIG_ARCH_OMAP1510 +static struct omap_irq_bank omap1510_irq_banks[] = { + { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, + { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed }, +}; +#endif - irq_bank_writel(val, bank, offset); -} +#if defined(CONFIG_ARCH_OMAP1610) || defined(CONFIG_ARCH_OMAP5912) +static struct omap_irq_bank omap1610_irq_banks[] = { + { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f }, + { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfffff7ff }, + { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xfffff7ff }, + { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff }, +}; +#endif -static struct omap_irq_desc *irq_bank_desc[] __initdata = { - &omap730_bank0_irqs, - &omap730_bank1_irqs, - &omap730_bank2_irqs, - &omap1510_bank0_irqs, - &omap1510_bank1_irqs, - &omap1610_bank0_irqs, - &omap1610_bank1_irqs, - &omap1610_bank2_irqs, - &omap1610_bank3_irqs, - NULL, +static struct irqchip omap_irq_chip = { + .ack = omap_mask_ack_irq, + .mask = omap_mask_irq, + .unmask = omap_unmask_irq, }; void __init omap_init_irq(void) { - int i,j, board_irq_type = 0, interrupts = 0; - struct omap_irq_desc *entry; + int i, j; +#ifdef CONFIG_ARCH_OMAP730 if (cpu_is_omap730()) { - board_irq_type = OMAP_IRQ_TYPE730; - } else if (cpu_is_omap1510()) { - board_irq_type = OMAP_IRQ_TYPE1510; - } else if (cpu_is_omap1610() || cpu_is_omap5912()) { - board_irq_type = OMAP_IRQ_TYPE1610; - } - - if (board_irq_type == 0) { - printk("Could not detect OMAP type\n"); - return; - } - - /* Scan through the interrupt bank maps and copy the right data */ - for (i = 0; (entry = irq_bank_desc[i]) != NULL; i++) { - if (entry->cpu_type == board_irq_type) { - printk("Type %i IRQs from %3i to %3i base at 0x%lx\n", - board_irq_type, entry->start_irq, - entry->start_irq + BANK_NR_IRQS, entry->base_reg); - - irq_banks[banks].start_irq = entry->start_irq; - irq_banks[banks].level_map = entry->level_map; - irq_banks[banks].base_reg = entry->base_reg; - irq_banks[banks].mask_reg = entry->mask_reg; - irq_banks[banks].ack_reg = entry->ack_reg; - irq_banks[banks].handler = entry->handler; - - interrupts += BANK_NR_IRQS; - banks++; - } + irq_banks = omap730_irq_banks; + irq_bank_count = ARRAY_SIZE(omap730_irq_banks); } - - printk("Found total of %i interrupts in %i interrupt banks\n", - interrupts, banks); +#endif +#ifdef CONFIG_ARCH_OMAP1510 + if (cpu_is_omap1510()) { + irq_banks = omap1510_irq_banks; + irq_bank_count = ARRAY_SIZE(omap1510_irq_banks); + } +#endif +#if defined(CONFIG_ARCH_OMAP1610) || defined(CONFIG_ARCH_OMAP5912) + if (cpu_is_omap1610() || cpu_is_omap5912()) { + irq_banks = omap1610_irq_banks; + irq_bank_count = ARRAY_SIZE(omap1610_irq_banks); + } +#endif + printk("Total of %i interrupts in %i interrupt banks\n", + irq_bank_count * 32, irq_bank_count); /* Mask and clear all interrupts */ - for (i = 0; i < banks; i++) { + for (i = 0; i < irq_bank_count; i++) { irq_bank_writel(~0x0, i, IRQ_MIR); irq_bank_writel(0x0, i, IRQ_ITR); } - /* - * Clear any pending interrupts - */ - irq_bank_writel(3, 0, IRQ_CONTROL_REG); - irq_bank_writel(3, 1, IRQ_CONTROL_REG); + /* Clear any pending interrupts */ + irq_bank_writel(0x03, 0, IRQ_CONTROL_REG); + irq_bank_writel(0x03, 1, IRQ_CONTROL_REG); /* Install the interrupt handlers for each bank */ - for (i = 0; i < banks; i++) { - for (j = irq_banks[i].start_irq; - j <= irq_banks[i].start_irq + BANK_NR_IRQS; j++) { - int irq_level; - set_irq_chip(j, irq_banks[i].handler); + for (i = 0; i < irq_bank_count; i++) { + for (j = i * 32; j < (i + 1) * 32; j++) { + int irq_trigger; + + irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j); + omap_irq_set_cfg(j, 0, 0, irq_trigger); + + set_irq_chip(j, &omap_irq_chip); set_irq_handler(j, do_level_IRQ); set_irq_flags(j, IRQF_VALID); - irq_level = irq_banks[i].level_map - >> (j - irq_banks[i].start_irq) & 1; - omap_irq_set_cfg(j, 0, 0, irq_level); } } /* Unmask level 2 handler */ - omap_writel(0, irq_banks[0].mask_reg); + omap_unmask_irq(INT_IH2_IRQ); } - -EXPORT_SYMBOL(omap_irq_set_cfg); diff -Nru a/arch/arm/mach-omap/irq.h b/arch/arm/mach-omap/irq.h --- a/arch/arm/mach-omap/irq.h Fri May 21 18:49:11 2004 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,172 +0,0 @@ -/* - * linux/arch/arm/mach-omap/irq.h - * - * OMAP specific interrupt bank definitions - * - * Copyright (C) 2004 Nokia Corporation - * Written by Tony Lindgren - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#define OMAP_IRQ_TYPE710 1 -#define OMAP_IRQ_TYPE730 2 -#define OMAP_IRQ_TYPE1510 3 -#define OMAP_IRQ_TYPE1610 4 -#define OMAP_IRQ_TYPE1710 5 - -#define MAX_NR_IRQ_BANKS 4 - -#define BANK_NR_IRQS 32 - -struct omap_irq_desc { - unsigned int cpu_type; - unsigned int start_irq; - unsigned long level_map; - unsigned long base_reg; - unsigned long mask_reg; - unsigned long ack_reg; - struct irqchip *handler; -}; - -struct omap_irq_bank { - unsigned int start_irq; - unsigned long level_map; - unsigned long base_reg; - unsigned long mask_reg; - unsigned long ack_reg; - struct irqchip *handler; -}; - -static void omap_offset_ack_irq(unsigned int irq); -static void omap_offset_mask_irq(unsigned int irq); -static void omap_offset_unmask_irq(unsigned int irq); -static void omap_offset_mask_ack_irq(unsigned int irq); - -/* NOTE: These will not work if irq bank offset != 0x100 */ -#define IRQ_TO_BANK(irq) (irq >> 5) -#define IRQ_BIT(irq) (irq & 0x1f) -#define BANK_OFFSET(bank) ((bank - 1) * 0x100) - -static struct irqchip omap_offset_irq = { - .ack = omap_offset_mask_ack_irq, - .mask = omap_offset_mask_irq, - .unmask = omap_offset_unmask_irq, -}; - -/* - * OMAP-730 interrupt banks - */ -static struct omap_irq_desc omap730_bank0_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE730, - .start_irq = 0, - .level_map = 0xb3f8e22f, - .base_reg = OMAP_IH1_BASE, - .mask_reg = OMAP_IH1_BASE + IRQ_MIR, - .ack_reg = OMAP_IH1_BASE + IRQ_CONTROL_REG, - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -static struct omap_irq_desc omap730_bank1_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE730, - .start_irq = 32, - .level_map = 0xfdb9c1f2, - .base_reg = OMAP_IH2_BASE, - .mask_reg = OMAP_IH2_BASE + IRQ_MIR, - .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -static struct omap_irq_desc omap730_bank2_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE730, - .start_irq = 64, - .level_map = 0x800040f3, - .base_reg = OMAP_IH2_BASE + 0x100, - .mask_reg = OMAP_IH2_BASE + 0x100 + IRQ_MIR, - .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, /* Not replicated */ - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -/* - * OMAP-1510 interrupt banks - */ -static struct omap_irq_desc omap1510_bank0_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE1510, - .start_irq = 0, - .level_map = 0xb3febfff, - .base_reg = OMAP_IH1_BASE, - .mask_reg = OMAP_IH1_BASE + IRQ_MIR, - .ack_reg = OMAP_IH1_BASE + IRQ_CONTROL_REG, - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -static struct omap_irq_desc omap1510_bank1_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE1510, - .start_irq = 32, - .level_map = 0xffbfffed, - .base_reg = OMAP_IH2_BASE, - .mask_reg = OMAP_IH2_BASE + IRQ_MIR, - .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -/* - * OMAP-1610 interrupt banks - */ -static struct omap_irq_desc omap1610_bank0_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE1610, - .start_irq = 0, - .level_map = 0xb3fefe8f, - .base_reg = OMAP_IH1_BASE, - .mask_reg = OMAP_IH1_BASE + IRQ_MIR, - .ack_reg = OMAP_IH1_BASE + IRQ_CONTROL_REG, - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -static struct omap_irq_desc omap1610_bank1_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE1610, - .start_irq = 32, - .level_map = 0xfffff7ff, - .base_reg = OMAP_IH2_BASE, - .mask_reg = OMAP_IH2_BASE + IRQ_MIR, - .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -static struct omap_irq_desc omap1610_bank2_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE1610, - .start_irq = 64, - .level_map = 0xffffffff, - .base_reg = OMAP_IH2_BASE + 0x100, - .mask_reg = OMAP_IH2_BASE + 0x100 + IRQ_MIR, - .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, /* Not replicated */ - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; - -static struct omap_irq_desc omap1610_bank3_irqs __initdata = { - .cpu_type = OMAP_IRQ_TYPE1610, - .start_irq = 96, - .level_map = 0xffffffff, - .base_reg = OMAP_IH2_BASE + 0x200, - .mask_reg = OMAP_IH2_BASE + 0x200 + IRQ_MIR, - .ack_reg = OMAP_IH2_BASE + IRQ_CONTROL_REG, /* Not replicated */ - .handler = &omap_offset_irq, /* IH2 regs at 0x100 offsets */ -}; diff -Nru a/arch/arm/mach-omap/leds-perseus2.c b/arch/arm/mach-omap/leds-perseus2.c --- a/arch/arm/mach-omap/leds-perseus2.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-omap/leds-perseus2.c Fri May 21 18:49:11 2004 @@ -96,7 +96,7 @@ /* * Actually burn the LEDs */ - omap_writew(~hw_led_state & 0xffff, OMAP730_FPGA_LEDS); + __raw_writew(~hw_led_state & 0xffff, OMAP730_FPGA_LEDS); local_irq_restore(flags); } diff -Nru a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig --- a/arch/arm/mach-pxa/Kconfig Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-pxa/Kconfig Fri May 21 18:49:11 2004 @@ -6,6 +6,12 @@ depends on ARCH_PXA select PXA25x +config MACH_MAINSTONE + bool "Intel HCDDBBVA0 Development Platform" + depends on ARCH_PXA + select PXA27x + #select IWMMXT + config ARCH_PXA_IDP bool "Accelent Xscale IDP" depends on ARCH_PXA diff -Nru a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile --- a/arch/arm/mach-pxa/Makefile Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-pxa/Makefile Fri May 21 18:49:11 2004 @@ -9,11 +9,13 @@ # Specific board support obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o +obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o # Support for blinky lights led-y := leds.o led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o +led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o obj-$(CONFIG_LEDS) += $(led-y) diff -Nru a/arch/arm/mach-pxa/leds-mainstone.c b/arch/arm/mach-pxa/leds-mainstone.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-pxa/leds-mainstone.c Fri May 21 18:49:11 2004 @@ -0,0 +1,118 @@ +/* + * linux/arch/arm/mach-pxa/leds-mainstone.c + * + * Author: Nicolas Pitre + * Created: Nov 05, 2002 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#include +#include +#include + +#include "leds.h" + + +/* 8 discrete leds available for general use: */ +#define D28 (1 << 0) +#define D27 (1 << 1) +#define D26 (1 << 2) +#define D25 (1 << 3) +#define D24 (1 << 4) +#define D23 (1 << 5) +#define D22 (1 << 6) +#define D21 (1 << 7) + +#define LED_STATE_ENABLED 1 +#define LED_STATE_CLAIMED 2 + +static unsigned int led_state; +static unsigned int hw_led_state; + +void mainstone_leds_event(led_event_t evt) +{ + unsigned long flags; + + local_irq_save(flags); + + switch (evt) { + case led_start: + hw_led_state = 0; + led_state = LED_STATE_ENABLED; + break; + + case led_stop: + led_state &= ~LED_STATE_ENABLED; + break; + + case led_claim: + led_state |= LED_STATE_CLAIMED; + hw_led_state = 0; + break; + + case led_release: + led_state &= ~LED_STATE_CLAIMED; + hw_led_state = 0; + break; + +#ifdef CONFIG_LEDS_TIMER + case led_timer: + hw_led_state ^= D26; + break; +#endif + +#ifdef CONFIG_LEDS_CPU + case led_idle_start: + hw_led_state &= ~D27; + break; + + case led_idle_end: + hw_led_state |= D27; + break; +#endif + + case led_halted: + break; + + case led_green_on: + hw_led_state |= D21;; + break; + + case led_green_off: + hw_led_state &= ~D21; + break; + + case led_amber_on: + hw_led_state |= D22;; + break; + + case led_amber_off: + hw_led_state &= ~D22; + break; + + case led_red_on: + hw_led_state |= D23;; + break; + + case led_red_off: + hw_led_state &= ~D23; + break; + + default: + break; + } + + if (led_state & LED_STATE_ENABLED) + MST_LEDCTRL = (MST_LEDCTRL | 0xff) & ~hw_led_state; + else + MST_LEDCTRL |= 0xff; + + local_irq_restore(flags); +} diff -Nru a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c --- a/arch/arm/mach-pxa/leds.c Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-pxa/leds.c Fri May 21 18:49:11 2004 @@ -20,6 +20,8 @@ { if (machine_is_lubbock()) leds_event = lubbock_leds_event; + if (machine_is_mainstone()) + leds_event = mainstone_leds_event; if (machine_is_pxa_idp()) leds_event = idp_leds_event; diff -Nru a/arch/arm/mach-pxa/leds.h b/arch/arm/mach-pxa/leds.h --- a/arch/arm/mach-pxa/leds.h Fri May 21 18:49:11 2004 +++ b/arch/arm/mach-pxa/leds.h Fri May 21 18:49:11 2004 @@ -7,5 +7,6 @@ * */ -extern void lubbock_leds_event(led_event_t evt); extern void idp_leds_event(led_event_t evt); +extern void lubbock_leds_event(led_event_t evt); +extern void mainstone_leds_event(led_event_t evt); diff -Nru a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/arm/mach-pxa/mainstone.c Fri May 21 18:49:11 2004 @@ -0,0 +1,139 @@ +/* + * linux/arch/arm/mach-pxa/mainstone.c + * + * Support for the Intel HCDDBBVA0 Development Platform. + * (go figure how they came up with such name...) + * + * Author: Nicolas Pitre + * Created: Nov 05, 2002 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "generic.h" + + +static unsigned long mainstone_irq_enabled; + +static void mainstone_mask_irq(unsigned int irq) +{ + int mainstone_irq = (irq - MAINSTONE_IRQ(0)); + MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); +} + +static void mainstone_unmask_irq(unsigned int irq) +{ + int mainstone_irq = (irq - MAINSTONE_IRQ(0)); + /* the irq can be acknowledged only if deasserted, so it's done here */ + MST_INTSETCLR &= ~(1 << mainstone_irq); + MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); +} + +static struct irqchip mainstone_irq_chip = { + .ack = mainstone_mask_irq, + .mask = mainstone_mask_irq, + .unmask = mainstone_unmask_irq, +}; + + +static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; + do { + GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ + if (likely(pending)) { + irq = MAINSTONE_IRQ(0) + __ffs(pending); + desc = irq_desc + irq; + desc->handle(irq, desc, regs); + } + pending = MST_INTSETCLR & mainstone_irq_enabled; + } while (pending); +} + +static void __init mainstone_init_irq(void) +{ + int irq; + + pxa_init_irq(); + + /* setup extra Mainstone irqs */ + for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { + set_irq_chip(irq, &mainstone_irq_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + set_irq_flags(MAINSTONE_IRQ(8), 0); + set_irq_flags(MAINSTONE_IRQ(12), 0); + + MST_INTMSKENA = 0; + MST_INTSETCLR = 0; + + set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); + set_irq_type(IRQ_GPIO(0), IRQT_FALLING); +} + + +static struct resource smc91x_resources[] = { + [0] = { + .start = (MST_ETH_PHYS + 0x300), + .end = (MST_ETH_PHYS + 0xfffff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MAINSTONE_IRQ(3), + .end = MAINSTONE_IRQ(3), + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +static void __init mainstone_init(void) +{ + platform_add_device(&smc91x_device); +} + + +static struct map_desc mainstone_io_desc[] __initdata = { + { MST_FPGA_VIRT, MST_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */ +}; + +static void __init mainstone_map_io(void) +{ + pxa_map_io(); + iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); +} + +MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") + MAINTAINER("MontaVista Software Inc.") + BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000)) + MAPIO(mainstone_map_io) + INITIRQ(mainstone_init_irq) + INIT_MACHINE(mainstone_init) +MACHINE_END diff -Nru a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h Fri May 21 18:49:11 2004 @@ -224,7 +224,7 @@ #define IXP4XX_OST_ENABLE 0x00000001 #define IXP4XX_OST_ONE_SHOT 0x00000002 /* Low order bits of reload value ignored */ -#define IXP4XX_OST_RELOAD_MASK 0x00000004 +#define IXP4XX_OST_RELOAD_MASK 0x00000003 #define IXP4XX_OST_DISABLED 0x00000000 #define IXP4XX_OSST_TIMER_1_PEND 0x00000001 #define IXP4XX_OSST_TIMER_2_PEND 0x00000002 diff -Nru a/include/asm-arm/arch-ixp4xx/timex.h b/include/asm-arm/arch-ixp4xx/timex.h --- a/include/asm-arm/arch-ixp4xx/timex.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-ixp4xx/timex.h Fri May 21 18:49:11 2004 @@ -6,7 +6,8 @@ #include /* - * We use IXP425 General purpose timer for our timer needs, it runs at 66 MHz + * We use IXP425 General purpose timer for our timer needs, it runs at + * 66.66... MHz */ -#define CLOCK_TICK_RATE (IXP4XX_PERIPHERAL_BUS_CLOCK * 1000000) +#define CLOCK_TICK_RATE (66666666) diff -Nru a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h --- a/include/asm-arm/arch-omap/dma.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-omap/dma.h Fri May 21 18:49:11 2004 @@ -208,6 +208,9 @@ extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode, unsigned long dest_start); +extern void omap_dma_link_lch (int lch_head, int lch_queue); +extern void omap_dma_unlink_lch (int lch_head, int lch_queue); + /* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */ extern int omap_dma_in_1510_mode(void); diff -Nru a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h --- a/include/asm-arm/arch-omap/hardware.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-omap/hardware.h Fri May 21 18:49:11 2004 @@ -295,26 +295,33 @@ */ #define OMAP_ID_REG __REG32(0xfffed404) +/* See also uncompress.h */ +#define OMAP_ID_730 0xB55F +#define OMAP_ID_1510 0xB470 +#define OMAP_ID_1610 0xB576 +#define OMAP_ID_1710 0xB5F7 +#define OMAP_ID_5912 0xB58C + #ifdef CONFIG_ARCH_OMAP730 #include "omap730.h" -#define cpu_is_omap730() (((OMAP_ID_REG >> 12) & 0xffff) == 0xB55F) +#define cpu_is_omap730() (((OMAP_ID_REG >> 12) & 0xffff) == OMAP_ID_730) #else #define cpu_is_omap730() 0 #endif #ifdef CONFIG_ARCH_OMAP1510 #include "omap1510.h" -#define cpu_is_omap1510() (((OMAP_ID_REG >> 12) & 0xffff) == 0xB470) +#define cpu_is_omap1510() (((OMAP_ID_REG >> 12) & 0xffff) == OMAP_ID_1510) #else #define cpu_is_omap1510() 0 #endif #ifdef CONFIG_ARCH_OMAP1610 #include "omap1610.h" -#define cpu_is_omap1710() (((OMAP_ID_REG >> 12) & 0xffff) == 0xB5F7) +#define cpu_is_omap1710() (((OMAP_ID_REG >> 12) & 0xffff) == OMAP_ID_1710) /* Detect 1710 as 1610 for now */ -#define cpu_is_omap1610() (((OMAP_ID_REG >> 12) & 0xffff) == 0xB576 || \ - cpu_is_omap1710()) +#define cpu_is_omap1610() (((OMAP_ID_REG >> 12) & 0xffff) == OMAP_ID_1610 \ + || cpu_is_omap1710()) #else #define cpu_is_omap1610() 0 #define cpu_is_omap1710() 0 @@ -322,7 +329,7 @@ #ifdef CONFIG_ARCH_OMAP5912 #include "omap5912.h" -#define cpu_is_omap5912() (((OMAP_ID_REG >> 12) & 0xffff) == 0xB58C) +#define cpu_is_omap5912() (((OMAP_ID_REG >> 12) & 0xffff) == OMAP_ID_5912) #else #define cpu_is_omap5912() 0 #endif diff -Nru a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h --- a/include/asm-arm/arch-omap/mux.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-omap/mux.h Fri May 21 18:49:11 2004 @@ -458,7 +458,7 @@ MUX_CFG("N19_1610_KBR5", 6, 12, 1, 1, 2, 1, 1, 1, 0) /* Power management */ -MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, 0, 0, 0, NA, 0, 0) +MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, NA, 0, 0, NA, 0, 0) }; #endif /* __MUX_C__ */ diff -Nru a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h --- a/include/asm-arm/arch-omap/uncompress.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-omap/uncompress.h Fri May 21 18:49:11 2004 @@ -25,8 +25,8 @@ #include #define UART_OMAP_MDR1 0x08 /* mode definition register */ - #define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0) +#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & 0xffff static void puts(const char *s) @@ -34,17 +34,27 @@ volatile u8 * uart = 0; int shift = 0; +#ifdef CONFIG_OMAP_LL_DEBUG_UART3 + uart = (volatile u8 *)(OMAP_UART3_BASE); +#elif CONFIG_OMAP_LL_DEBUG_UART2 + uart = (volatile u8 *)(OMAP_UART2_BASE); +#else + uart = (volatile u8 *)(OMAP_UART1_BASE); +#endif + /* Determine which serial port to use */ do { - if (machine_is_omap_innovator() || machine_is_omap_osk()) { + /* MMU is not on, so cpu_is_omapXXXX() won't work here */ + unsigned int omap_id = omap_get_id(); + + if (omap_id == OMAP_ID_1510 || omap_id == OMAP_ID_1610 || + omap_id == OMAP_ID_1710 || omap_id == OMAP_ID_5912) { shift = 2; - uart = (volatile u8 *)(OMAP_UART1_BASE); - } else if (machine_is_omap_perseus2()) { + } else if (omap_id == OMAP_ID_730) { shift = 0; - uart = (volatile u8 *)(OMAP_UART1_BASE); } else { - /* Assume nothing for unknown machines. - * Add an entry for your machine to select + /* Assume nothing for unknown OMAP processors. + * Add an entry for your OMAP type to select * the default serial console here. If the * serial port is enabled, we'll use it to * display status messages. Else we'll be diff -Nru a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h --- a/include/asm-arm/arch-pxa/hardware.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-pxa/hardware.h Fri May 21 18:49:11 2004 @@ -98,6 +98,7 @@ */ #include "lubbock.h" +#include "mainstone.h" #include "idp.h" #endif /* _ASM_ARCH_HARDWARE_H */ diff -Nru a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h --- a/include/asm-arm/arch-pxa/irqs.h Fri May 21 18:49:11 2004 +++ b/include/asm-arm/arch-pxa/irqs.h Fri May 21 18:49:11 2004 @@ -118,7 +118,8 @@ */ #ifdef CONFIG_SA1111 #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) -#elif defined(CONFIG_ARCH_LUBBOCK) +#elif defined(CONFIG_ARCH_LUBBOCK) || \ + defined(CONFIG_MACH_MAINSTONE) #define NR_IRQS (IRQ_BOARD_END) #else #define NR_IRQS (IRQ_BOARD_START) @@ -137,4 +138,20 @@ #define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5) #define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ #define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) + +#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) +#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) +#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) +#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) +#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) +#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) +#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) +#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) +#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) +#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) +#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) +#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) +#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) +#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) +#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) diff -Nru a/include/asm-arm/arch-pxa/mainstone.h b/include/asm-arm/arch-pxa/mainstone.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-arm/arch-pxa/mainstone.h Fri May 21 18:49:11 2004 @@ -0,0 +1,120 @@ +/* + * linux/include/asm-arm/arch-pxa/mainstone.h + * + * Author: Nicolas Pitre + * Created: Nov 14, 2002 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ASM_ARCH_MAINSTONE_H +#define ASM_ARCH_MAINSTONE_H + +#define MST_ETH_PHYS PXA_CS4_PHYS + +#define MST_FPGA_PHYS PXA_CS2_PHYS +#define MST_FPGA_VIRT (0xf0000000) +#define MST_P2V(x) ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT) +#define MST_V2P(x) ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS) + +#ifndef __ASSEMBLY__ +# define __MST_REG(x) (*((volatile unsigned long *)MST_P2V(x))) +#else +# define __MST_REG(x) MST_P2V(x) +#endif + +/* board level registers in the FPGA */ + +#define MST_LEDDAT1 __MST_REG(0x08000010) +#define MST_LEDDAT2 __MST_REG(0x08000014) +#define MST_LEDCTRL __MST_REG(0x08000040) +#define MST_GPSWR __MST_REG(0x08000060) +#define MST_MSCWR1 __MST_REG(0x08000080) +#define MST_MSCWR2 __MST_REG(0x08000084) +#define MST_MSCWR3 __MST_REG(0x08000088) +#define MST_MSCRD __MST_REG(0x08000090) +#define MST_INTMSKENA __MST_REG(0x080000c0) +#define MST_INTSETCLR __MST_REG(0x080000d0) +#define MST_PCMCIA0 __MST_REG(0x080000e0) +#define MST_PCMCIA1 __MST_REG(0x080000e4) + +#define MST_MSCWR1_CAMERA_ON (1 << 15) /* Camera interface power control */ +#define MST_MSCWR1_CAMERA_SEL (1 << 14) /* Camera interface mux control */ +#define MST_MSCWR1_LCD_CTL (1 << 13) /* General-purpose LCD control */ +#define MST_MSCWR1_MS_ON (1 << 12) /* Memory Stick power control */ +#define MST_MSCWR1_MMC_ON (1 << 11) /* MultiMediaCard* power control */ +#define MST_MSCWR1_MS_SEL (1 << 10) /* SD/MS multiplexer control */ +#define MST_MSCWR1_BB_SEL (1 << 9) /* PCMCIA/Baseband multiplexer */ +#define MST_MSCWR1_BT_ON (1 << 8) /* Bluetooth UART transceiver */ +#define MST_MSCWR1_BTDTR (1 << 7) /* Bluetooth UART DTR */ + +#define MST_MSCWR1_IRDA_MASK (3 << 5) /* IrDA transceiver mode */ +#define MST_MSCWR1_IRDA_FULL (0 << 5) /* full distance power */ +#define MST_MSCWR1_IRDA_OFF (1 << 5) /* shutdown */ +#define MST_MSCWR1_IRDA_MED (2 << 5) /* 2/3 distance power */ +#define MST_MSCWR1_IRDA_LOW (3 << 5) /* 1/3 distance power */ + +#define MST_MSCWR1_IRDA_FIR (1 << 4) /* IrDA transceiver SIR/FIR */ +#define MST_MSCWR1_GREENLED (1 << 3) /* LED D1 control */ +#define MST_MSCWR1_PDC_CTL (1 << 2) /* reserved */ +#define MST_MSCWR1_MTR_ON (1 << 1) /* Silent alert motor */ +#define MST_MSCWR1_SYSRESET (1 << 0) /* System reset */ + +#define MST_MSCWR2_USB_OTG_RST (1 << 6) /* USB On The Go reset */ +#define MST_MSCWR2_USB_OTG_SEL (1 << 5) /* USB On The Go control */ +#define MST_MSCWR2_nUSBC_SC (1 << 4) /* USB client soft connect control */ +#define MST_MSCWR2_I2S_SPKROFF (1 << 3) /* I2S CODEC amplifier control */ +#define MST_MSCWR2_AC97_SPKROFF (1 << 2) /* AC97 CODEC amplifier control */ +#define MST_MSCWR2_RADIO_PWR (1 << 1) /* Radio module power control */ +#define MST_MSCWR2_RADIO_WAKE (1 << 0) /* Radio module wake-up signal */ + +#define MST_MSCWR3_GPIO_RESET_EN (1 << 2) /* Enable GPIO Reset */ +#define MST_MSCWR3_GPIO_RESET (1 << 1) /* Initiate a GPIO Reset */ +#define MST_MSCWR3_COMMS_SW_RESET (1 << 0) /* Communications Processor Reset Control */ + +#define MST_MSCRD_nPENIRQ (1 << 9) /* ADI7873* nPENIRQ signal */ +#define MST_MSCRD_nMEMSTK_CD (1 << 8) /* Memory Stick detection signal */ +#define MST_MSCRD_nMMC_CD (1 << 7) /* SD/MMC card detection signal */ +#define MST_MSCRD_nUSIM_CD (1 << 6) /* USIM card detection signal */ +#define MST_MSCRD_USB_CBL (1 << 5) /* USB client cable status */ +#define MST_MSCRD_TS_BUSY (1 << 4) /* ADI7873 busy */ +#define MST_MSCRD_BTDSR (1 << 3) /* Bluetooth UART DSR */ +#define MST_MSCRD_BTRI (1 << 2) /* Bluetooth UART Ring Indicator */ +#define MST_MSCRD_BTDCD (1 << 1) /* Bluetooth UART DCD */ +#define MST_MSCRD_nMMC_WP (1 << 0) /* SD/MMC write-protect status */ + +#define MST_INT_S1_IRQ (1 << 15) /* PCMCIA socket 1 IRQ */ +#define MST_INT_S1_STSCHG (1 << 14) /* PCMCIA socket 1 status changed */ +#define MST_INT_S1_CD (1 << 13) /* PCMCIA socket 1 card detection */ +#define MST_INT_S0_IRQ (1 << 11) /* PCMCIA socket 0 IRQ */ +#define MST_INT_S0_STSCHG (1 << 10) /* PCMCIA socket 0 status changed */ +#define MST_INT_S0_CD (1 << 9) /* PCMCIA socket 0 card detection */ +#define MST_INT_nEXBRD_INT (1 << 7) /* Expansion board IRQ */ +#define MST_INT_MSINS (1 << 6) /* Memory Stick* detection */ +#define MST_INT_PENIRQ (1 << 5) /* ADI7873* touch-screen IRQ */ +#define MST_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */ +#define MST_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ +#define MST_INT_USBC (1 << 2) /* USB client cable detection IRQ */ +#define MST_INT_USIM (1 << 1) /* USIM card detection IRQ */ +#define MST_INT_MMC (1 << 0) /* MMC/SD card detection IRQ */ + +#define MST_PCMCIA_nIRQ (1 << 10) /* IRQ / ready signal */ +#define MST_PCMCIA_nSPKR_BVD2 (1 << 9) /* VDD sense / digital speaker */ +#define MST_PCMCIA_nSTSCHG_BVD1 (1 << 8) /* VDD sense / card status changed */ +#define MST_PCMCIA_nVS2 (1 << 7) /* VSS voltage sense */ +#define MST_PCMCIA_nVS1 (1 << 6) /* VSS voltage sense */ +#define MST_PCMCIA_nCD (1 << 5) /* Card detection signal */ +#define MST_PCMCIA_RESET (1 << 4) /* Card reset signal */ +#define MST_PCMCIA_PWR_MASK (0x000f) /* MAX1602 power-supply controls */ + +#define MST_PCMCIA_PWR_VPP_0 0x0 /* voltage VPP = 0V */ +#define MST_PCMCIA_PWR_VPP_120 0x2 /* voltage VPP = 12V*/ +#define MST_PCMCIA_PWR_VPP_VCC 0x1 /* voltage VPP = VCC */ +#define MST_PCMCIA_PWR_VCC_0 0x0 /* voltage VCC = 0V */ +#define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */ +#define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ + +#endif