bk://linux-dj.bkbits.net/cpufreq
davej@redhat.com|ChangeSet|20040422150905|03388 davej

# This is a BitKeeper generated diff -Nru style patch.
#
# ChangeSet
#   2004/04/22 16:09:05+01:00 davej@redhat.com 
#   [CPUFREQ] powernow-k8: prevent BIOSs offering a vid of 0x1f, which means off.
#   From paul.devriendt@amd.com
# 
# arch/i386/kernel/cpu/cpufreq/powernow-k8.c
#   2004/04/22 16:08:59+01:00 davej@redhat.com +7 -0
#   [CPUFREQ] powernow-k8: prevent BIOSs offering a vid of 0x1f, which means off.
#   From paul.devriendt@amd.com
# 
# ChangeSet
#   2004/04/22 16:05:21+01:00 davej@redhat.com 
#   [CPUFREQ] powernow-k8 ignore invalid p-states.
#   From paul.devriendt@amd.com
# 
# arch/i386/kernel/cpu/cpufreq/powernow-k8.c
#   2004/04/22 16:05:16+01:00 davej@redhat.com +7 -6
#   [CPUFREQ] powernow-k8 ignore invalid p-states.
#   From paul.devriendt@amd.com
# 
# ChangeSet
#   2004/04/22 16:01:36+01:00 davej@redhat.com 
#   [CPUFREQ] powernow-k8 cpuid changes.
#   cpuid changes to support new processors that will be coming out in the
#   future. Also works around a processor that we have released to the field
#   that can have an erroneous cpuid value.
#   
#   From paul.devriendt@amd.com
# 
# arch/i386/kernel/cpu/cpufreq/powernow-k8.h
#   2004/04/22 16:01:29+01:00 davej@redhat.com +9 -7
#   [CPUFREQ] powernow-k8 cpuid changes.
#   cpuid changes to support new processors that will be coming out in the
#   future. Also works around a processor that we have released to the field
#   that can have an erroneous cpuid value.
#   
#   From paul.devriendt@amd.com
# 
# arch/i386/kernel/cpu/cpufreq/powernow-k8.c
#   2004/04/22 16:01:29+01:00 davej@redhat.com +5 -8
#   [CPUFREQ] powernow-k8 cpuid changes.
#   cpuid changes to support new processors that will be coming out in the
#   future. Also works around a processor that we have released to the field
#   that can have an erroneous cpuid value.
#   
#   From paul.devriendt@amd.com
# 
# ChangeSet
#   2004/04/13 10:02:09-07:00 akpm@bix.(none) 
#   Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-cpufreq
# 
# arch/i386/kernel/cpu/cpufreq/Kconfig
#   2004/04/13 10:02:06-07:00 akpm@bix.(none) +0 -0
#   Auto merged
# 
# ChangeSet
#   2004/04/12 20:52:00-07:00 akpm@bix.(none) 
#   Merge bix.(none):/usr/src/bk25 into bix.(none):/usr/src/bk-cpufreq
# 
# arch/i386/kernel/cpu/cpufreq/Kconfig
#   2004/04/12 20:51:56-07:00 akpm@bix.(none) +0 -0
#   Auto merged
# 
diff -Nru a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c	Thu Apr 29 23:10:39 2004
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c	Thu Apr 29 23:10:39 2004
@@ -39,7 +39,7 @@
 
 #define PFX "powernow-k8: "
 #define BFX PFX "BIOS error: "
-#define VERSION "version 1.00.08b"
+#define VERSION "version 1.00.09b"
 #include "powernow-k8.h"
 
 /* serialize freq changes  */
@@ -450,13 +450,10 @@
 		goto out;
 
 	eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
-	if ((eax & CPUID_XFAM_MOD) == ATHLON64_XFAM_MOD) {
-		dprintk(KERN_DEBUG PFX "AMD Althon 64 Processor found\n");
-	} else if ((eax & CPUID_XFAM_MOD) == OPTERON_XFAM_MOD) {
-		dprintk(KERN_DEBUG PFX "AMD Opteron Processor found\n");
-	} else {
-		printk(KERN_INFO PFX
-		       "AMD Athlon 64 or AMD Opteron processor required\n");
+	if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
+	    ((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
+	    ((eax & CPUID_XMOD) > CPUID_XMOD_REV_E)) {
+		printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
 		goto out;
 	}
 
@@ -524,11 +521,12 @@
 {
 	int j;
 	for (j = 0; j < data->numps; j++) {
-		printk(KERN_INFO PFX "   %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
-			data->powernow_table[j].index & 0xff,
-			data->powernow_table[j].frequency/1000,
-			data->powernow_table[j].index >> 8,
-			find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
+		if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID)
+			printk(KERN_INFO PFX "   %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
+				data->powernow_table[j].index & 0xff,
+				data->powernow_table[j].frequency/1000,
+				data->powernow_table[j].index >> 8,
+				find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
 	}
 	if (data->batps)
 		printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
@@ -723,7 +721,14 @@
 		/* verify frequency is OK */
 		if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
 			(powernow_table[i].frequency < (MIN_FREQ * 1000))) {
-			dprintk(KERN_INFO PFX "invalid freq %u kHz\n", powernow_table[i].frequency);
+			dprintk(KERN_INFO PFX "invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
+			powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+			continue;
+		}
+
+		/* verify voltage is OK - BIOSs are using "off" to indicate invalid */
+		if (vid == 0x1f) {
+			dprintk(KERN_INFO PFX "invalid vid %u, ignoring\n", vid);
 			powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
 			continue;
 		}
diff -Nru a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h	Thu Apr 29 23:10:39 2004
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h	Thu Apr 29 23:10:39 2004
@@ -38,13 +38,15 @@
 
 
 /* processor's cpuid instruction support */
-#define CPUID_PROCESSOR_SIGNATURE             1	/* function 1 */
-#define CPUID_XFAM_MOD               0x0ff00ff0	/* extended fam, fam + model */
-#define ATHLON64_XFAM_MOD            0x00000f40	/* extended fam, fam + model */
-#define OPTERON_XFAM_MOD             0x00000f50	/* extended fam, fam + model */
-#define CPUID_GET_MAX_CAPABILITIES   0x80000000
-#define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007
-#define P_STATE_TRANSITION_CAPABLE            6
+#define CPUID_PROCESSOR_SIGNATURE	1	/* function 1 */
+#define CPUID_XFAM			0x0ff00000	/* extended family */
+#define CPUID_XFAM_K8			0
+#define CPUID_XMOD			0x000f0000	/* extended model */
+#define CPUID_XMOD_REV_E		0x00020000
+#define CPUID_USE_XFAM_XMOD		0x00000f00
+#define CPUID_GET_MAX_CAPABILITIES	0x80000000
+#define CPUID_FREQ_VOLT_CAPABILITIES	0x80000007
+#define P_STATE_TRANSITION_CAPABLE	6
 
 /* Model Specific Registers for p-state transitions. MSRs are 64-bit. For     */
 /* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and   */
