
From: Anton Blanchard <anton@samba.org>

Restore the old cpu names in /proc/cpuinfo, some applications parse this
field.


---

 arch/ppc64/kernel/cputable.c |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)

diff -puN arch/ppc64/kernel/cputable.c~ppc64-restore-cpu-names arch/ppc64/kernel/cputable.c
--- 25/arch/ppc64/kernel/cputable.c~ppc64-restore-cpu-names	2004-02-22 11:56:05.000000000 -0800
+++ 25-akpm/arch/ppc64/kernel/cputable.c	2004-02-22 11:56:05.000000000 -0800
@@ -46,7 +46,7 @@ extern void __setup_cpu_ppc970(unsigned 
 
 struct cpu_spec	cpu_specs[] = {
     {	/* Power3 */
-	    0xffff0000, 0x00400000, "Power3 (630)",
+	    0xffff0000, 0x00400000, "POWER3 (630)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 		    CPU_FTR_DABR | CPU_FTR_IABR,
 	    COMMON_USER_PPC64,
@@ -55,7 +55,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* Power3+ */
-	    0xffff0000, 0x00410000, "Power3 (630+)",
+	    0xffff0000, 0x00410000, "POWER3 (630+)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 		    CPU_FTR_DABR | CPU_FTR_IABR,
 	    COMMON_USER_PPC64,
@@ -64,7 +64,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* Northstar */
-	    0xffff0000, 0x00330000, "Northstar",
+	    0xffff0000, 0x00330000, "RS64-II (northstar)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 		    CPU_FTR_DABR | CPU_FTR_IABR,
 	    COMMON_USER_PPC64,
@@ -73,7 +73,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* Pulsar */
-	    0xffff0000, 0x00340000, "Pulsar",
+	    0xffff0000, 0x00340000, "RS64-III (pulsar)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 		    CPU_FTR_DABR | CPU_FTR_IABR,
 	    COMMON_USER_PPC64,
@@ -82,7 +82,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* I-star */
-	    0xffff0000, 0x00360000, "I-star",
+	    0xffff0000, 0x00360000, "RS64-III (icestar)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 		    CPU_FTR_DABR | CPU_FTR_IABR,
 	    COMMON_USER_PPC64,
@@ -91,7 +91,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* S-star */
-	    0xffff0000, 0x00370000, "S-star",
+	    0xffff0000, 0x00370000, "RS64-IV (sstar)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 		    CPU_FTR_DABR | CPU_FTR_IABR,
 	    COMMON_USER_PPC64,
@@ -100,7 +100,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* Power4 */
-	    0xffff0000, 0x00350000, "Power4",
+	    0xffff0000, 0x00350000, "POWER4 (gp)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_DABR,
 	    COMMON_USER_PPC64,
@@ -109,7 +109,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* Power4+ */
-	    0xffff0000, 0x00380000, "Power4+",
+	    0xffff0000, 0x00380000, "POWER4+ (gq)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_DABR,
 	    COMMON_USER_PPC64,
@@ -136,7 +136,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* Power5 */
-	    0xffff0000, 0x003a0000, "Power5",
+	    0xffff0000, 0x003a0000, "POWER5 (gr)",
 	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 	    CPU_FTR_PPCAS_ARCH_V2,
 	    COMMON_USER_PPC64,
@@ -145,7 +145,7 @@ struct cpu_spec	cpu_specs[] = {
 	    COMMON_PPC64_FW
     },
     {	/* default match */
-	    0x00000000, 0x00000000, "(Power4-Compatible)",
+	    0x00000000, 0x00000000, "POWER4 (compatible)",
   	    CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_DABR,
 	    COMMON_USER_PPC64,

_
