From: Petr Vandrovec Well, problem is not in bit 6 in IER, but in bit 6 in high divisor byte, as DLAB is set to one from previous probe. This simple clear of LCR register fixes problem with (probably all 16550A) chips being detected as XScale, and in addition to it it does not switch my 115200Bd serial line to 7Bd mode (0x4001 divisor) anymore. Signed-off-by: Andrew Morton --- 25-akpm/drivers/serial/8250.c | 1 + 1 files changed, 1 insertion(+) diff -puN drivers/serial/8250.c~xscale-8250-patches-cause-malfunction-on-amd-8111 drivers/serial/8250.c --- 25/drivers/serial/8250.c~xscale-8250-patches-cause-malfunction-on-amd-8111 2005-03-07 18:10:01.000000000 -0800 +++ 25-akpm/drivers/serial/8250.c 2005-03-07 18:10:01.000000000 -0800 @@ -729,6 +729,7 @@ static void autoconfig_16550a(struct uar serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); status2 = serial_in(up, UART_IIR) >> 5; serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); + serial_outp(up, UART_LCR, 0); DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2); _