From: "Andi Kleen" On K8 L1 TLB is inclusive, so don't include it in the TLB count. Signed-off-by: Andi Kleen Signed-off-by: Andrew Morton --- 25-akpm/arch/x86_64/kernel/setup.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff -puN arch/x86_64/kernel/setup.c~x86_64-fix-tlb-reporting-on-k8 arch/x86_64/kernel/setup.c --- 25/arch/x86_64/kernel/setup.c~x86_64-fix-tlb-reporting-on-k8 2005-01-09 23:01:28.224092392 -0800 +++ 25-akpm/arch/x86_64/kernel/setup.c 2005-01-09 23:01:28.227091936 -0800 @@ -657,9 +657,9 @@ static void __init display_cacheinfo(str cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n", edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); - c->x86_cache_size=(ecx>>24)+(edx>>24); - /* DTLB and ITLB together, but only 4K */ - c->x86_tlbsize = ((ebx>>16)&0xff) + (ebx&0xff); + c->x86_cache_size=(ecx>>24)+(edx>>24); + /* On K8 L1 TLB is inclusive, so don't count it */ + c->x86_tlbsize = 0; } if (n >= 0x80000006) { _